Simplified Synchronous Machine Model
Phasor Arithmetics
Fast Decoupled and DC Powerflow
Conjugate Addition (1,4-Addition) vs Direct Addition (1,2-Addition)
Operational Amplifiers
Design Example: Capacitance Multiplier Circuit
You might also read
Articles linked to this work by shared authors, journal, and citation graph.
Updated: Jul 14, 2025

Author Spotlight: Introduction to Active Probe Atomic Force Microscopy with Quattro-Parallel Cantilever Arrays
Published on: June 13, 2023
Padmanabhan Balasubramanian1, Weichen Liu1
1School of Computer Science and Engineering, Nanyang Technological University, Singapore, Singapore.
This study introduces novel asynchronous carry look-ahead adders (CLAs) for faster and more energy-efficient computing. The block CLA (BCLA) design significantly optimizes performance metrics like delay, area, and power consumption.
Area of Science:
Background:
Purpose of the Study:
Main Methods:
Main Results:
Conclusions: