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The Stack Optimization of Magnetic Heterojunction Structures for Next-Generation Spintronic Logic Applications.
Jaehun Cho1, Jinyong Jung2, Seong Bok Kim1
1Division of Nanotechnology, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu 42988, Republic of Korea.
Materials (Basel, Switzerland)
|October 14, 2023
Summary
An ultrathin platinum layer suppresses interfacial Dzyaloshinskii-Moriya interaction in magnetic heterojunctions, enabling robust interlayer coupling. This optimization is crucial for next-generation spintronic logic devices and novel NOT gate designs.
Area of Science:
- Condensed Matter Physics
- Materials Science
- Spintronics
Background:
- Magnetic heterojunctions are key for spintronic devices.
- Interfacial Dzyaloshinskii-Moriya interaction (DMI) and interlayer exchange coupling (IEC) are critical parameters.
- Controlling these interactions is essential for device functionality.
Purpose of the Study:
- To engineer magnetic heterojunctions with suppressed interfacial DMI.
- To maintain sustainable long-range interlayer exchange coupling.
- To optimize multilayer stacks for spintronic logic applications.
Main Methods:
- Fabrication of magnetic heterojunctions with an ultrathin platinum insertion layer.
- Systematic inelastic light scattering spectroscopy measurements.
- Tuning ruthenium layer thickness to control exchange couplings.
Main Results:
- Suppression of interfacial Dzyaloshinskii-Moriya interaction (DMI) by the platinum insertion layer.
- Restoration of system symmetry and minimization of DMI.
- Maintenance of strong interlayer exchange coupling (IEC).
- Observation of synthetic ferromagnetic and antiferromagnetic couplings.
- Demonstration of minimized domain wall tilting and positioning issues.
Conclusions:
- Optimized magnetic multilayer stacks with Pt insertion layers are suitable for spintronic logic.
- The engineered structures avoid critical issues like domain wall tilting.
- Synthetic antiferromagnetic coupling offers a new route for current-induced domain wall motion NOT gates.
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