Laterally gated ferroelectric field effect transistor (LG-FeFET) using α-In₂Se₃ for stacked in-memory computing array

Area of Science:

• Materials Science
• Electrical Engineering
• Computer Science

Background:

• In-memory computing offers efficient data processing by avoiding data transfer.
• High-density memory arrays are crucial for managing large data volumes in such systems.
• Existing solutions face challenges in achieving the required density and integration.

Purpose of the Study:

• To present a novel stacked ferroelectric memory array for in-memory computing.
• To demonstrate the potential of laterally gated ferroelectric field-effect transistors (LG-FeFETs) in high-density memory applications.
• To verify the feasibility of 3D stacked structures for efficient computational tasks.

Main Methods:

• Fabrication of a stacked ferroelectric memory array using laterally gated ferroelectric field-effect transistors (LG-FeFETs).
• Utilizing the interlocking effect of α-In2Se3 to control channel conductance.
• Characterization of LG-FeFET properties including memory window, switching, retention, and endurance.
• Design and implementation of a 3D stacked memory structure.
• Verification of the structure's performance through multiply-accumulate (MAC) operations.

Main Results:

• LG-FeFETs exhibit a wide memory window, effective ferroelectric switching, and long retention time (>3×10^4 s).
• The devices demonstrate high endurance (>10^5 cycles).
• Vertically stacked structures are feasible due to reduced device height, simplifying integration.
• A two-tier stacked memory configuration successfully performed multiply-accumulate (MAC) operations.

Conclusions:

• The developed LG-FeFET based stacked memory array is a promising candidate for high-density in-memory computing.
• The device's characteristics and suitability for 3D integration address key challenges in data-intensive computing.
• This technology paves the way for more efficient and powerful computational systems.