Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis

Area of Science:

• Materials Science
• Electrical Engineering
• Nanotechnology

Background:

• Direct integration of carbon nanotubes (CNTs) with CMOS technology is crucial for advanced micro- and nanotechnology applications.
• Fabricating CMOS-MEMS polysilicon heaters capable of reaching CNT synthesis temperatures (~650-900°C) requires specialized post-processing steps.

Purpose of the Study:

• To develop and detail post-CMOS processing techniques for fabricating polysilicon microheaters.
• To enable localized thermal chemical vapor deposition (CVD) of CNTs directly on CMOS chips.

Main Methods:

• Utilized a subtractive fabrication technique with CMOS passivation layers as masks for micromachining polysilicon heaters.
• Developed a two-step reactive ion etching (RIE) process for SiO2 dielectric etching with high selectivity and uniformity.
• Implemented wet etching of SiO2 for partial suspension of microheaters, ensuring high thermal isolation with minimal damage to aluminum layers.

Main Results:

• Successfully fabricated CMOS-MEMS polysilicon microheaters through advanced post-CMOS processing.
• Demonstrated the successful synthesis of CNTs on the fabricated microheaters using local thermal CVD.
• Achieved high thermal isolation and minimized damage to underlying CMOS layers during fabrication.

Conclusions:

• The developed post-CMOS processing is effective for fabricating high-temperature polysilicon microheaters for CMOS-CNT integration.
• This heterogeneous monolithic integration approach shows potential for wafer-level manufacturing of CNT-based sensors.
• The process can be incorporated into existing foundry CMOS processes, paving the way for scalable production.