Integrated Logic Circuits Based on Wafer-Scale 2D-MoS₂ FETs Using Buried-Gate Structures

Area of Science:

• Materials Science
• Electrical Engineering
• Nanotechnology

Background:

• Two-dimensional (2D) transition-metal dichalcogenides (TMDs), like molybdenum disulfide (MoS₂), offer unique electrical properties for next-generation integrated circuits.
• Local back-gate transistors using MoS₂ on silicon substrates suffer from degraded electrical characteristics due to non-uniform field control from gate sidewalls.

Purpose of the Study:

• To address the limitations of local back-gate MoS₂ transistors.
• To enhance the performance of MoS₂-based transistors and integrated logic circuits.

Main Methods:

• Fabrication of buried-gate MoS₂ transistors with gate electrodes embedded in the silicon substrate.
• Characterization and comparison of device parameters (field-effect mobility, on/off current ratio, breakdown voltage) against local back-gate designs.
• Integration of buried-gate MoS₂ transistors into various logic gates (inverters, NAND, NOR, AND, OR) on a 2-inch wafer scale.

Main Results:

• Significant improvements in field-effect mobility (0.166 to 1.08 cm²/V·s).
• Dramatically enhanced on/off current ratio (4.90 × 10⁵ to 1.52 × 10⁷).
• Increased breakdown voltage of the gate dielectric (15.73 to 27.48 V).

Conclusions:

• Buried-gate architecture effectively resolves the non-uniform field controllability issues of local back-gate designs.
• The fabricated buried-gate MoS₂ transistors demonstrate superior performance metrics suitable for high-performance logic circuits.
• Successful wafer-scale integration of diverse logic gates showcases the potential of this technology for future electronic devices.