Artificial Neural Network Modeling of a CMOS Differential Low-Noise Amplifier Using the Bayesian Regularization...

Area of Science:

• Electrical Engineering
• Computer Science

Background:

• Differential Low-Noise Amplifiers (LNAs) are crucial for satellite transponder applications.
• Existing techniques like gain boosting, linearity improvement, and body bias are often applied individually.

Purpose of the Study:

• To model a differential CMOS LNA using an Artificial Neural Network (ANN).
• To combine gain boosting, linearity improvement, and body bias techniques in a single differential LNA design.
• To validate the ANN model against circuit simulations.

Main Methods:

• Development of a differential CMOS LNA incorporating gain boosting, linearity improvement, and body bias.
• Modeling the LNA using an Artificial Neural Network (ANN) with PatternNet BR.
• Simulation of the LNA using Cadence at 5 GHz.

Main Results:

• The proposed LNA achieved a high gain (S21) of 29.5 dB and a low noise figure (NF) of 1.2 dB at 0.9 V supply.
• Excellent linearity (IIP3 of 0.2 dBm) and low power consumption (19.3 mW) were demonstrated.
• The ANN model's simulation results closely matched the Cadence simulation outcomes.

Conclusions:

• The combined techniques in the differential LNA significantly outperform designs using only two techniques.
• The developed ANN provides an accurate and efficient method for modeling and simulating LNAs.
• This approach offers accurate circuit solutions compared to traditional simulation methods.