Design of Power Amplifiers for BDS-3 Terminal Based on InGaP/GaAs HBT MMIC and LGA Technology

Area of Science:

• Electrical Engineering
• Satellite Communications
• Semiconductor Devices

Background:

• The Beidou-3 navigation satellite system (BDS-3) requires high-performance radio frequency (RF) transmitting circuits for its unique short message function.
• The RF power amplifier (PA) is a critical component determining the overall performance of RF transmitting circuits, impacting transmission power, efficiency, linearity, and integration.

Purpose of the Study:

• To design and simulate a highly integrated L-band PA chip for BDS-3 terminals.
• To achieve high output power, efficiency, and linearity while ensuring harmonic suppression and compact size.

Main Methods:

• Design of an L-band PA chip using InGaP/GaAs heterojunction bipolar transistor (HBT) technology.
• Integration of temperature-insensitive adaptive bias, class-F harmonic suppression, analog pre-distortion, adaptive power detection, and LGA packaging technologies.
• Development of auxiliary platforms for simulation and optimization of PA designs.

Main Results:

• The PA chip achieves a linear gain of up to 39.4 dB and saturated output power (Psat) up to 38.2 dBm.
• Power added efficiency (PAE) reaches 51.7%, with higher harmonic suppression ratios below -62 dBc.
• The chip boasts a compact size of 6 × 4 × 1 mm³.

Conclusions:

• The designed L-band PA chip demonstrates high gain, efficiency, and linearity, outperforming similar designs.
• The PA chip meets the requirements for the short message function of BDS-3 terminals across various scenarios.
• The integrated design and advanced technologies employed offer significant advantages for satellite communication applications.