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An FPGA-Based High-Performance Stateful Packet Processing Method.

Rui Lu^1,2, Zhichuan Guo^1,2,3

¹National Network New Media Engineering Research Center, Institute of Acoustics, Chinese Academy of Sciences, No. 21, North Fourth Ring Road, Haidian District, Beijing 100190, China.

|November 25, 2023

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This study introduces a high-performance Field Programmable Gate Array (FPGA)-based approach for stateful data planes. It enhances packet processing efficiency and ensures flow state consistency using dynamic scheduling, improving overall network performance.

Area of Science:

Computer Engineering
Network Engineering
Hardware Acceleration

Background:

Stateful data planes offer improved packet processing efficiency by offloading state and control logic from controllers.
Existing stateful data plane implementations struggle with state consistency and throughput limitations.
Field Programmable Gate Arrays (FPGAs) present a potential hardware solution for high-performance packet processing.

Purpose of the Study:

To present a novel high-performance, FPGA-based approach for stateful packet processing.
To address the challenges of state consistency and throughput in stateful data planes.
To demonstrate the effectiveness of the Packet Header Vector (PHV) dynamic scheduling technique.

Main Methods:

Implementation of a stateful data plane on an FPGA.

Keywords:

FPGA PHV dynamic scheduling configurable stateful data plane

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Utilizing the Packet Header Vector (PHV) dynamic scheduling technique for state management.

Experimental evaluation of the proposed approach's performance and latency.

Main Results:

The proposed FPGA-based method achieves operational speeds of 200 MHz.
Introduced latency ranges from 3 to 12 microseconds.
The approach demonstrates a significant degree of programmability for flexible network functions.

Conclusions:

The FPGA-based stateful data plane effectively ensures flow state consistency.
The PHV dynamic scheduling technique contributes to high-performance packet processing.
This method offers a viable solution for enhancing network efficiency and programmability.