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MOSFET: Depletion Mode01:20

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Depletion-mode MOSFETs represent a unique subset of MOSFET technology, functioning fundamentally differently from their enhancement-mode counterparts. Unlike enhancement MOSFETs, which require a positive gate-source voltage (Vgs) to turn on, depletion-mode MOSFETs are inherently conductive and "normally on" devices.
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Correction: Kang et al. Fluid Flow to Electricity: Capturing Flow-Induced Vibrations with Micro-Electromechanical-System-Based Piezoelectric Energy Harvester. <i>Micromachines</i> 2024, <i>15</i>, 581.

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A High-Precision Voltage-Quantization-Based Current-Mode Computing-in-Memory SRAM.

Ruiyong Zhao1,2, Zhenghui Gong1, Yulan Liu1,2

  • 1Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200031, China.

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|December 23, 2023
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Summary
This summary is machine-generated.

Non-linear distortion in current-mode computing-in-memory SRAM (CIM-SRAM) limits performance. A new high-precision, fully dynamic range IV (HFIV) conversion circuit significantly improves CIM-SRAM calculation linearity.

Keywords:
SRAManalog non-idealitycomputing-in-memoryhigh-precision fully dynamic range IV conversion circuit

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Area of Science:

  • Electrical Engineering
  • Computer Engineering
  • Materials Science

Background:

  • Non-linear signal distortion is a critical issue in current-mode computing-in-memory SRAM (CIM-SRAM) circuits.
  • This non-linearity directly impedes computational performance and limits the overall computing power of CIM-SRAM.

Purpose of the Study:

  • To investigate the root causes of non-linearity and inconsistency in CIM-SRAM circuits.
  • To propose and validate a novel circuit solution for enhancing CIM-SRAM accuracy.

Main Methods:

  • Detailed analysis of non-linearity origins in CIM-SRAM.
  • Development of a high-precision, fully dynamic range IV (HFIV) conversion circuit.
  • Integration of the HFIV circuit into bit lines (BL) for voltage clamping and current mirroring.
  • Evaluation using a 55 nm complementary metal-oxide semiconductor (CMOS) process and comparison with prior studies.

Main Results:

  • The proposed HFIV circuit effectively addresses non-linear distortion in CIM-SRAM.
  • Achieved calculation linearity of 99.92% for 8-32 SRAM bit-cells and 99.8% for 32-64 SRAM bit-cells.
  • Demonstrated performance under a 1.2 V supply voltage.

Conclusions:

  • The HFIV circuit is a viable solution for improving the precision of CIM-SRAM.
  • This advancement enhances the practical application and computational capabilities of CIM-SRAM technology.
  • The proposed circuit offers a significant improvement in linearity for current-mode CIM-SRAM.