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Related Experiment Video

Updated: Jul 5, 2025

Plasmonic Trapping and Release of Nanoparticles in a Monitoring Environment
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Mask correction method for surface plasmon lithography.

Le Ma, Libin Zhang, Jianfang He

    Applied Optics
    |January 16, 2024
    PubMed
    Summary
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    This study introduces a new model for surface plasmon lithography (SPL) mask correction, significantly reducing critical dimension (CD) errors in nano-fabrication. The improved model enhances pattern fidelity for manufacturing applications.

    Area of Science:

    • Nanotechnology and Materials Science
    • Optical Engineering
    • Semiconductor Manufacturing

    Background:

    • Surface plasmon lithography (SPL) is an advanced nano-fabrication technique.
    • Achieving high pattern fidelity in SPL requires precise mask correction to minimize critical dimension (CD) errors.
    • Existing aerial image models (FDTD, RCWA) are insufficient for manufacturing-level mask correction.

    Purpose of the Study:

    • To develop a comprehensive model for SPL mask correction.
    • To improve the accuracy of critical dimension (CD) control in nano-fabrication using SPL.
    • To establish rule tables for mask correction based on simulated after-development images (ADI).

    Main Methods:

    • A combined optical and resist model was developed for SPL simulation.

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  • The Finite Difference Time Domain (FDTD) method was employed for optical modeling.
  • Test patterns with a 130 nm target CD were simulated to generate ADI data.
  • Rule tables were derived from simulation data for 1D line and line-end patterns.
  • Main Results:

    • The comprehensive model accurately simulated after-development images (ADI) for SPL.
    • Rule tables for mask correction were successfully established for 1D line and line-end patterns.
    • Post-corrected patterns demonstrated significantly improved critical dimension (CD) error performance.

    Conclusions:

    • The proposed comprehensive model enhances SPL pattern fidelity for manufacturing.
    • This approach offers a viable solution for reducing CD errors in nano-fabrication.
    • The developed rule tables provide a practical method for SPL mask correction.