Impact of the Tip-to-Semiconductor Contact in the Electrical Characterization of Nanowires

Well-defined semiconductor heterostructures are a basic requirement for the development of high-performance optoelectronic devices. In order to achieve the desired properties, a thorough study of the electrical behavior with a suitable spatial resolution is essential. For this, various sophisticated tip-based methods can be employed, such as conductive atomic force microscopy or multitip scanning tunneling microscopy (MT-STM). We demonstrate that in any tip-based measurement method, the tip-to-semiconductor contact is decisive for reliable and precise measurements and in interpreting the properties of the sample. For that, we used our ultrahigh-vacuum-based MT-STM coupled in vacuo to a reactor for the preparation of nanowires (NWs) with metal organic vapor phase epitaxy, and operated our MT-STM as a four-point nanoprober on III-V semiconductor NW heterostructures. We investigated a variety of upright, free-standing NWs with axial as well as coaxial heterostructures on the growth substrates. Our investigation reveals charging currents at the interface between the measuring tip and the semiconductor via native insulating oxide layers, which act as a metal-insulator-semiconductor capacitor with charging and discharging conditions in the operating voltage range. We analyze in detail the observed I-V characteristics and propose a strategy to achieve an optimized tip-to-semiconductor junction, which includes the influence of the native oxide layer on the overall electrical measurements. Our advanced experimental procedure enables a direct relation between the tip-to-NW junction and the electronic properties of as-grown (co)axial NWs providing precise guidance for all future tip-based investigations.