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    Area of Science:

    • Biomedical Engineering
    • Neuroscience Technology
    • Integrated Circuit Design

    Background:

    • Multi-channel neural recording is crucial for understanding brain activity.
    • Existing systems face challenges with noise, power consumption, and area efficiency.
    • Multiplexing neural signals requires complex digital processing for signal extraction.

    Purpose of the Study:

    • To develop a digitally-assisted multi-channel neural recording system with improved efficiency.
    • To reduce integrated noise and power consumption in neural signal acquisition.
    • To minimize the area footprint of neural recording systems.

    Main Methods:

    • Utilized a 16-channel chopper-stabilized Time Division Multiple Access (TDMA) scheme.
    • Implemented a novel impedance booster with a Sign-Sign Least Mean Squares (LMS) adaptive filter.
    • Designed and fabricated a System-on-Chip (SoC) in 65 nm CMOS technology.

    Main Results:

    • Achieved 2.4x and 4.3x noise reduction in Local Field Potential (LFP) and Action Potential (AP) bands, respectively.
    • Increased analog front-end (AFE) input impedance by 39x with minimal area increase.
    • Demonstrated significant savings (3.6x area, 2.8x power) in Electrode Offset Voltage (EOV) filtering.
    • Achieved low input-referred noise (2.19 µVrms for AP, 2.4 µVrms for LFP) and a competitive Noise Efficiency Factor (NEF) of 1.8.

    Conclusions:

    • The proposed TDMA-based system offers a highly efficient solution for multi-channel neural recording.
    • The integrated impedance booster and adaptive filtering techniques enhance signal quality and reduce power.
    • The compact and low-power design is suitable for advanced neural interface applications.