RC-Effects on the Oxide of SOI MOSFET under Off-State TDDB Degradation: RF Characterization and Modeling

Area of Science:

• Electrical Engineering
• Materials Science
• Semiconductor Physics

Background:

• Dynamic charge trapping/de-trapping in gate oxides affects device performance.
• Dielectric loss and leakage current are critical factors in radio frequency (RF) impedance.
• Understanding these effects is crucial for accurate device modeling and reliability assessment.

Purpose of the Study:

• To analyze the impact of dynamic trapping, dielectric loss, and leakage current on RF small-signal input impedance.
• To develop a methodology for extracting model parameters related to these effects.
• To investigate the evolution of these parameters under electrical stress and different bias conditions.

Main Methods:

• Utilized S-parameter measurements for RF analysis.
• Systematically extracted model parameters from single device measurements across various frequencies.
• Applied the methodology to devices under non-conducting electrical stress and varying gate-to-source bias.

Main Results:

• Accurate modeling of RF impedance up to 30 GHz achieved by incorporating additional resistive and capacitive components into the gate capacitance model.
• Successfully distinguished the contributions of different physical effects to the device's impedance.
• Demonstrated maintained correlation accuracy during off-state degradation and under different bias conditions.

Conclusions:

• The proposed methodology effectively analyzes and models dynamic effects influencing RF impedance in semiconductor devices.
• Enhanced gate capacitance models provide excellent correlation with experimental data.
• The approach is robust for assessing device degradation and performance under various operating conditions.