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Quasi-light Storage for Optical Data Packets

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Theory and design of parallel decoding for a ternary optical computer.

Honghong Zhang, Shan Ouyang, Weimin Lian

|March 4, 2024

Summary

This summary is machine-generated.

This study introduces a novel hardware parallel decoding scheme for ternary optical computers, enhancing correctness and efficiency over software methods. The proposed design is proven practical and feasible through experimental validation.

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Area of Science:

Computer Engineering
Optical Computing
Digital Electronics

Background:

Software decoding in ternary optical computers faces challenges in correctness and efficiency.
Existing methods lack optimized hardware solutions for parallel decoding.

Purpose of the Study:

To propose and validate a hardware-based parallel decoding scheme for ternary optical computers.
To improve the accuracy and speed of decoding operations in optical computing systems.

Main Methods:

Designed a hardware decoding voltage divider circuit and single-pixel transcoding.
Developed a parallel decoding scheme for SJ-MSD and TW-MSD adders using Shen's theorem and degraded design theory.
Implemented a time-sharing combination for the decoding scheme and an addressing scheme for result access.

Main Results:

The proposed hardware parallel decoding scheme addresses correctness and efficiency issues.
Experimental results demonstrate the practicality and feasibility of the developed scheme.
The time-sharing combination approach was selected for optimal performance.

Conclusions:

The hardware parallel decoding scheme offers a viable solution for ternary optical computers.
This advancement contributes to more efficient and reliable optical computing systems.
The proposed methods are experimentally validated, confirming their practical applicability.