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Intermittent-Aware Design Exploration of Systolic Array Using Various Non-Volatile Memory: A Comparative Study.
Nedasadat Taheri1, Sepehr Tabrizchi1, Arman Roohi1
1School of Computing, University of Nebraska-Lincoln, Lincoln, NE 68588, USA.
This study explores intermittent computing in IoT systems, finding that the IDEA spatial architecture with row stationary dataflow boosts power efficiency by 2.7% and reduces cycles by 21% for AlexNet on CIFAR10.
Area of Science:
- Computer Architecture
- Embedded Systems
- Non-Volatile Memory Technologies
Background:
- Intermittent computing is crucial for Internet of Things (IoT) devices with power constraints.
- Understanding dataflow (row, weight, output) and memory interactions is key for optimization.
- Existing architectures may not fully exploit intermittent computing's potential in IoT.
Purpose of the Study:
- To comprehensively study intermittent computing in IoT environments.
- To analyze the interplay between dataflows and non-volatile memory technologies.
- To evaluate architectural optimizations for enhanced performance and energy efficiency.
Main Methods:
- Investigated various dataflow types (row, weight, output) with different non-volatile memory technologies.
- Employed the IDEA spatial architecture with rhythmically arranged processing elements.
- Evaluated performance using the AlexNet model on the CIFAR10 dataset.
Main Results:
- The IDEA architecture with row stationary dataflow achieved a 2.7% power efficiency gain.
- An average reduction of 21% in required cycles was observed.
- Demonstrated comparative advantages of different architectural and dataflow combinations.
Conclusions:
- Architectural choices significantly impact energy efficiency and performance in intermittent IoT systems.
- The IDEA architecture shows promise for optimizing intermittent computing applications.
- Further research can explore diverse combinations for tailored IoT solutions.

