Solution-processable low-voltage carbon nanotube field-effect transistors with high-krelaxor ferroelectric polymer...

Area of Science:

• Materials Science
• Nanotechnology
• Electrical Engineering

Background:

• Field-effect transistors (FETs) are crucial for electronic devices, with energy efficiency and high performance being key goals.
• Semiconducting single-walled carbon nanotubes (s-SWNTs) offer promising properties for next-generation FETs.
• High-k dielectric materials are essential for enabling low-voltage operation in FETs.

Purpose of the Study:

• To investigate the impact of high-k relaxor ferroelectric insulator P(VDF-TrFE-CFE) thickness on semiconducting single-walled carbon nanotube field-effect transistors (s-SWNT-FETs).
• To achieve energy-efficient and high-performance s-SWNT-FETs for low-voltage operation through optimized insulator thickness.
• To understand the relationship between insulator thickness, capacitance, gate leakage current, and device performance.

Main Methods:

• Fabrication of s-SWNT-FETs using P(VDF-TrFE-CFE) as a high-k ferroelectric insulator.
• Systematic variation of the insulator thickness to study its effect on device characteristics.
• Electrical characterization of s-SWNT-FETs, including measurements of drain current, gate leakage current, mobility, and on/off ratio.
• Analysis of the influence of insulator thickness on gate capacitance and breakdown voltage.

Main Results:

• s-SWNT-FETs with an optimized insulator thickness of approximately 800 nm achieved the highest average mobility (14.4 cm^2V^-1s^-1) at 1V drain voltage and a high on/off ratio (>10^5).
• Optimized performance was attributed to suppressed gate leakage current and sufficient gate capacitance (>50 nF cm^-2).
• Both insufficient (<450 nm) and excessive (>1200 nm) insulator thicknesses led to reduced device performance due to high leakage current or insufficient capacitance, respectively.

Conclusions:

• Precise control over the high-k ferroelectric insulator thickness is critical for optimizing s-SWNT-FET performance, particularly for low-voltage operation.
• While optimized thickness enhances p-type performance, n-type performance can be negatively impacted by increased electron trap density due to fluorine incorporation, which is proportional to insulator thickness.
• The study highlights the trade-offs between dielectric properties (capacitance, leakage) and device performance as a function of insulator thickness.