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Related Experiment Video

Updated: Jun 28, 2025

Theoretical Calculation and Experimental Verification for Dislocation Reduction in Germanium Epitaxial Layers with Semicylindrical Voids on Silicon

Theoretical Calculation and Experimental Verification for Dislocation Reduction in Germanium Epitaxial Layers with Semicylindrical Voids on Silicon

Published on: July 17, 2020

Three-Dimensional Epitaxy of Low-Defect 3C-SiC on a Geometrically Modified Silicon Substrate.

Gerard Colston¹, Kelly Turner¹, Arne Renz¹

¹School of Engineering, The University of Warwick, Coventry CV4 7AL, UK.

Materials (Basel, Switzerland)

|April 13, 2024

Summary

We grew cubic silicon carbide (3C-SiC) on compliant substrates, reducing defects by patterning silicon. This method uses standard semiconductor techniques for high-quality 3C-SiC films.

Keywords:

3C-SiC compliant substrate conformal epitaxy epitaxy stacking faults

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Last Updated: Jun 28, 2025

Theoretical Calculation and Experimental Verification for Dislocation Reduction in Germanium Epitaxial Layers with Semicylindrical Voids on Silicon

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Published on: July 17, 2020

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Published on: July 17, 2015

Probing C84-embedded Si Substrate Using Scanning Probe Microscopy and Molecular Dynamics

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Published on: September 28, 2016

Area of Science:

Materials Science
Semiconductor Physics
Crystal Growth

Background:

Cubic silicon carbide (3C-SiC) is a promising semiconductor material.
Defects in 3C-SiC epilayers hinder device performance.
Compliant substrates offer a route to reduce defect density.

Purpose of the Study:

To demonstrate the growth of 3C-SiC with reduced planar defects.
To investigate defect suppression using micro-scale compliant substrates.
To optimize growth conditions for high-quality 3C-SiC epilayers.

Main Methods:

Fabrication of micro-scale trenches (2 µm width/separation) in Si(001) substrates.
Heteroepitaxial growth of 3C-SiC within these trenches.
Hydrogen annealing at 1100 °C and HCl addition during growth.

Main Results:

Planar defects were suppressed and channeled away from the 3C-SiC epilayer.
Void formation between 3C-SiC columns terminated defects.
HCl addition promoted column coalescence into a continuous epilayer.

Conclusions:

Micro-scale compliant substrates effectively reduce planar defects in 3C-SiC.
The process utilizes standard semiconductor industry techniques.
This approach is independent of substrate orientation and offcut.