Promotion of Processability in a p-Type Thin-Film Transistor Using a Se-Te Alloying Channel Layer

Area of Science:

• Materials Science
• Semiconductor Physics
• Electronics Engineering

Background:

• Traditional silicon-based electronics face limitations.
• p-type thin-film transistors (pTFTs) are crucial for advanced electronics but face fabrication challenges.
• Previous high-performance pTFTs required cryogenic temperatures and ultra-thin channels, limiting practical application.

Purpose of the Study:

• To develop a high-performance pTFT with a more feasible fabrication process.
• To investigate the potential of a Se-Te alloyed channel for pTFT applications.
• To demonstrate the integration of Se-Te pTFTs in complementary circuits.

Main Methods:

• Fabrication of a 60-nm-thick Se_0.5Te_0.5 alloyed channel using pulsed laser ablation at room temperature.
• Characterization of the pTFT performance including field-effect mobility, on/off current ratio, subthreshold slope, and turn-on voltage.
• Conventional annealing at 250 °C.
• Integration of a complementary-type inverter with an n-type Al-doped InZnSnO TFT.

Main Results:

• Achieved a field-effect mobility of 3 cm²/V·s.
• Obtained an on/off current ratio of 3 × 10⁵ and a subthreshold slope of 2.1 V/decade.
• Demonstrated a turn-on voltage of 6.5 V.
• Integrated complementary-type inverter exhibited a high voltage gain of 12 and low static power consumption of 17 nW.

Conclusions:

• The Se-Te alloyed channel approach offers a straightforward and cost-effective method for fabricating high-performance pTFTs.
• This technology overcomes the limitations of cryogenic growth and ultra-thin channels.
• The Se-Te alloyed pTFTs are suitable for complementary circuit applications, paving the way for next-generation electronics.