Memristor-CMOS Hybrid Circuits Implementing Event-Driven Neural Networks for Dynamic Vision Sensor Camera

Area of Science:

• Neuromorphic Engineering
• Computer Engineering
• Artificial Intelligence

Background:

• Spiking neural networks offer low power but complex training.
• Digital CMOS neural networks allow direct training but have high energy overhead.
• Processing Dynamic Vision Sensor (DVS) camera data presents challenges for traditional neural networks.

Purpose of the Study:

• To propose memristor-CMOS hybrid circuits for event-driven neural networks.
• To combine the benefits of spike-based computation with standard backpropagation training.
• To reduce hardware and energy overhead in processing DVS camera events.

Main Methods:

• Developed hybrid circuits with memristor-based input neurons and synaptic crossbars.
• Utilized memristor crossbars for low-power Multiply-Accumulate (MAC) operations.
• Implemented Rectified Linear Unit (ReLU) activation and a controller for dynamic clock gating.

Main Results:

• Achieved significant power savings of up to 79% for POKER-DVS dataset with minimal performance degradation (0.5%).
• Demonstrated power reduction of 75% for MNIST-DVS dataset with a slight recognition rate decrease (0.75%).
• Verified the proposed hybrid circuits' effectiveness through simulations on event-based datasets.

Conclusions:

• Memristor-CMOS hybrid circuits offer an efficient solution for event-driven neural networks.
• The proposed architecture balances performance and substantial power savings for DVS processing.
• This approach enables low-power, hardware-efficient implementation of advanced neural network models.