Related Experiment Video
Updated: Jun 27, 2025

Scalable Quantum Integrated Circuits on Superconducting Two-Dimensional Electron Gas Platform
Published on: August 2, 2019
Dual-Junction Field-Effect Transistor with Ultralow Subthreshold Swing Approaching the Theoretical Limit
Xinhao Chen1, Shasha Li2, Lingyu Zhu1
1School of Semiconductor Science and Technology, South China Normal University, Foshan ,Guangdong 528225, P. R. China.
None:
Metal-oxide-semiconductor field-effect transistors as basic electronic devices of integrated circuits have been greatly developed and widely used in the past decades. However, as the thickness of the conducting channel decreases, the interface electronic scattering between the gate oxide layer and the channel significantly impacts the performance of the transistor. To address this issue, van der Waals heterojunction field-effect transistors (vdWJFETs) have been proposed using two-dimensional semiconductors, which utilize the built-in electric field at the sharp van der Waals interface to regulate the channel conductance without the need of a complex gate oxide layer. In this study, a novel dual-junction vdWJFET composed of a MoS2 channel and a Te nanosheet gate has been developed. This device achieves an ultralow subthreshold swing (SS) and an extremely low current hysteresis, greatly surpassing the single-junction vdWJFET. In the transistor, the SS decreases from 475.04 to 68.3 mV dec-1, nearly approaching the theoretical limit of 60 mV dec-1 at room temperature. The pinch-off voltage (Vp) decreases from -4.5 to -0.75 V, with a current hysteresis of ∼10 mV and a considerable field-effect mobility (μ) of 36.43 cm2 V-1 s-1. The novel dual-junction vdWJFET provides a new approach to realize a transistor with a theoretical ideal SS and a negligible current hysteresis toward low-power electronic applications.
Related Concept Videos
Characteristics of JFET
The core of a JFET's operation is controlling drain current by modulating the gate-source voltage. When the drain and gate voltage are set to zero, the JFET exhibits no net current flow, representing a state of equilibrium. The drain current increases linearly as the...
Biasing of FET
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the...
MOSFET: Enhancement Mode
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no...
Field Effect Transistor
Characteristics of MOSFET
Various vital parameters influence their functionality, which is crucial for theory and electronics applications. First, channel dimensions, precisely length, and width, are pivotal. The size of these channels affects the transistor's ability to carry current and switching speeds; shorter channels typically enable...
MOSFET: Depletion Mode
The primary characteristic of depletion-mode MOSFETs is their ability to conduct current between the drain and source terminals without gate bias. This inherent conductivity...

