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Updated: Jun 27, 2025

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
Published on: August 28, 2018
Enhancing Carrier Mobility in Monolayer MoS2 Transistors with Process-Induced Strain
Yue Zhang1, He Lin Zhao2, Siyuan Huang1
1Department of Mechanical Science and Engineering, University of Illinois Urbana-Champaign, Urbana, Illinois 61801, United States.
Researchers used process-induced strain in 2D materials, like molybdenum disulfide (MoS2) transistors, to boost electronic performance. This method enhances carrier mobility and saturation current, paving the way for advanced beyond-silicon electronics.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Nanotechnology
Background:
- Two-dimensional (2D) electronic materials offer potential for next-generation electronics due to excellent size scaling.
- Integrating 2D materials with existing CMOS processes is challenging, with limited understanding of how processing affects material properties.
- Strain and doping significantly impact 2D material device performance, but their interplay with fabrication steps is not well understood.
Purpose of the Study:
- To investigate the impact of process-induced strain on the electronic properties of 2D material transistors.
- To demonstrate the use of a common semiconductor industry technique, thin film deposition, to tune strain in 2D materials.
- To correlate changes in strain and doping with device performance in monolayer MoS2 transistors.
Main Methods:
- Systematic variation of tensile strain in monolayer MoS2 transistors using iterative deposition of MgO stressor layers.
- Combined Raman spectroscopy and electrical transport measurements to analyze strain, doping, and device characteristics.
- Characterization of strain uniformity and mechanical stability at different stressor thicknesses.
Main Results:
- Achieved uniform tensile strain up to 0.48 ± 0.05% in MoS2 channels with 150 nm MgO stressors.
- Observed mechanical instability and nonuniform strain at higher stressor thicknesses.
- Demonstrated a significant enhancement in electron mobility (130 ± 40% per % strain) and channel saturation current density (52 ± 20%) with increasing tensile strain.
Conclusions:
- Process-induced strain is an effective method to enhance carrier mobility and current density in 2D transistors.
- Established CMOS fabrication techniques can be adapted to precisely control strain in 2D materials.
- This approach accelerates the integration of 2D electronics into future computing architectures by leveraging existing industry processes.
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