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  1. Home
  2. A Parallel Compression Pipeline For Improving Gpu Virtualization Data Transfers.
  1. Home
  2. A Parallel Compression Pipeline For Improving Gpu Virtualization Data Transfers.

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A Parallel Compression Pipeline for Improving GPU Virtualization Data Transfers.

Cristian Peñaranda1, Carlos Reaño2, Federico Silla1

  • 1Departamento de Informática de Sistemas y Computadores, Universitat Politècnica de València, 46022 Valencia, Spain.

Sensors (Basel, Switzerland)
|July 27, 2024

View abstract on PubMed

Summary
This summary is machine-generated.

This study introduces a parallel compression pipeline to boost remote GPU virtualization for edge computing. The solution effectively doubles network bandwidth, overcoming limitations for demanding deep learning applications.

Keywords:
CUDAdeep learningnetwork bandwidthon-the-fly compressionparallel compression pipelinerCUDAremote GPU virtualization

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Area of Science:

  • Computer Science
  • Electrical Engineering

Background:

  • Graphics Processing Units (GPUs) accelerate deep learning but face limitations on edge devices.
  • Remote GPU virtualization offers a solution but is constrained by network bandwidth.

Purpose of the Study:

  • To address network bandwidth limitations in remote GPU virtualization for edge computing.
  • To implement and evaluate a parallel compression pipeline for transparent data compression.

Main Methods:

  • Developed a parallel compression pipeline integrated into the communication layer of remote GPU virtualization.
  • Conducted a thorough performance analysis to quantify the impact on network bandwidth.

Main Results:

  • The implemented parallel compression pipeline significantly enhances practical network bandwidth.
  • Network bandwidth was observed to increase by a factor of up to 2×.
  • Conclusions:

    • On-the-fly compression is an effective strategy to overcome network bandwidth bottlenecks in remote GPU virtualization.
    • This approach enables more efficient deployment of deep learning applications on resource-constrained edge devices.