Reconfigurable aJ-Level Ferroelectric Transistor-Based Boolean Logic for Logic-in-Memory.

Area of Science:

• Materials Science
• Computer Engineering
• Nanotechnology

Background:

• The von Neumann bottleneck limits computing performance due to data transfer inefficiencies between processing and memory units.
• Logic-in-memory (LIM) architectures offer a promising solution by performing computations directly within memory.
• Developing robust and efficient engineering building blocks for LIM remains a significant challenge.

Purpose of the Study:

• To propose and demonstrate a reconfigurable strategy for efficient Boolean logic implementation using hafnium oxide-based ferroelectric field-effect transistors (HfO2-based FeFETs).
• To showcase the in situ storage of logic results within the FeFET device for true LIM operation.
• To evaluate the energy efficiency, reliability, and performance of FeFETs in LIM architectures.

Main Methods:

• Fabrication and characterization of HfO2-based FeFET devices.
• Implementation of Boolean logic functions directly on the FeFETs.
• Measurement of switching speed, power consumption, endurance, and data retention characteristics.

Main Results:

• Demonstrated efficient execution of Boolean logics with ultra-low energy consumption (< 8 attojoule/operation).
• Achieved in situ storage of logic results within the FeFET, characteristic of LIM.
• Exhibited exceptional device reliability with computing endurance > 10^8 cycles and retention > 1000 s.

Conclusions:

• HfO2-based FeFETs provide a viable and high-performance building block for advanced LIM computing architectures.
• The proposed reconfigurable strategy significantly advances the potential for attojoule-level energy consumption in computing.
• FeFETs offer a promising pathway beyond the limitations of traditional von Neumann architectures for future computing systems.