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An integrated coupled oscillator network to solve optimization problems.

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This study introduces a scalable oscillator-based Ising machine for efficient combinatorial optimization. The novel silicon chip solves complex problems rapidly with low power consumption, offering a promising alternative to classical methods.

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Area of Science:

  • * Physics and Engineering
  • * Computer Science
  • * Materials Science

Background:

  • * Classical algorithms for combinatorial optimization are time and energy-intensive.
  • * Oscillator-based Ising machines offer a more efficient analog approach.
  • * Efficiently mapping problems onto oscillator networks (embedding) is challenging.

Purpose of the Study:

  • * To present a scalable oscillator-based approach for solving Ising and quadratic unconstrained binary optimization (QUBO) problems.
  • * To demonstrate a novel silicon chip design with routable oscillator connections.
  • * To analyze the performance and robustness of the system.

Main Methods:

  • * Design and fabrication of a scalable Ising machine on a 28nm silicon chip with 1440 oscillators.
  • * Implementation of routable oscillator connections to simplify problem embedding.
  • * Utilization of frequency, phase, and delay calibration for manufacturing variation tolerance.
  • * Evaluation using benchmark problems to assess parameter sensitivity.

Main Results:

  • * The manufactured chip solves optimization problems in 950 ns.
  • * Power consumption is approximately 319 μW per node.
  • * The system demonstrates robustness against manufacturing variations through calibration.
  • * Sensitivity analysis of coupling strength and frequency was performed.

Conclusions:

  • * The developed oscillator-based Ising machine offers a highly efficient and scalable solution for combinatorial optimization.
  • * The chip's performance in speed and power consumption presents a significant advancement.
  • * Calibration techniques ensure reliable operation, paving the way for practical applications.