Dual-Mode Reconfigurable Split-Gate Logic Transistor through Van der Waals Integration.

Area of Science:

• Materials Science
• Electronics Engineering
• Nanotechnology

Background:

• Silicon transistors face physical size limitations, driving research into beyond-Moore strategies.
• Two-dimensional (2D) materials offer promising architectures for novel electronic devices.
• Existing 2D devices often involve complex fabrication and performance limitations due to metal-semiconductor interfaces.

Purpose of the Study:

• To develop a reconfigurable logic device using 2D materials.
• To overcome limitations of current 2D electronic devices.
• To create a versatile device capable of multiple logic operations and memory functions.

Main Methods:

• Fabrication of a WSe2 transistor with a nanofloating gate and split-gates via van der Waals integration.
• Utilizing van der Waals contacts to achieve low Schottky barrier height.
• Applying varying split-gate biases for volatile logic operations.
• Leveraging charge trapping in the nanofloating gate for nonvolatile logic operations.

Main Results:

• Achieved a low Schottky barrier height due to van der Waals contacts.
• Demonstrated volatile reconfigurable homojunctions and AND, OR, NOR, NAND logic operations using a single device.
• Achieved nonvolatile reconfigurable homojunctions and AND, OR logic operations via charge trapping.
• Volatile and nonvolatile operations mimic short-term and long-term synaptic plasticity.

Conclusions:

• A novel reconfigurable logic device based on WSe2 was successfully constructed.
• The device offers a simple fabrication process and low cost for advanced electronic applications.
• This work presents a potential pathway for creating next-generation reconfigurable functional electronic devices.