Related Experiment Video
Updated: Jun 9, 2025

11:54
Microfluidic Platform with Multiplexed Electronic Detection for Spatial Tracking of Particles
Published on: March 13, 2017
9.2K
Improved PEG-Based Construction of Analog Fountain Codes
1School of Electronic and Information Engineering, Beihang University, Beijing 100191, China.
Entropy (Basel, Switzerland)
|October 25, 2024
Summary
This study introduces an improved progressive edge-growth (PEG) construction for analog fountain codes (AFCs). The new method enhances performance, particularly reducing harmful cycles and improving block error rates in short block lengths.
Area of Science:
- Information Theory
- Coding Theory
- Digital Communications
Background:
- Analog fountain codes (AFCs) are efficient coding schemes for reliable data transmission.
- The progressive edge-growth (PEG) construction is a key method for building AFCs.
- Harmful short cycles in AFCs can degrade performance, especially in short block length regimes.
Purpose of the Study:
- To propose an enhanced progressive edge-growth (PEG) construction for analog fountain codes (AFCs).
- To reduce the probability of large weight coefficients contributing to harmful short cycles.
- To improve the block error rate (BLER) performance of AFCs, particularly for short block lengths.
Main Methods:
- A novel PEG construction algorithm is developed.
- Simultaneous allocation of weight coefficients in descending order during edge selection.
- Mathematical analysis to evaluate the impact on cycle formation.
- Simulations to assess block error rate (BLER) performance.
Main Results:
- The proposed PEG construction effectively minimizes the occurrence of large weight coefficients in short cycles.
- The improved construction demonstrates a reduced probability of harmful short cycles.
- Simulation results show a good block error rate (BLER) performance for the proposed AFCs in the short block length regime.
Conclusions:
- The improved PEG construction offers a viable enhancement for analog fountain codes.
- This method provides better error resilience, especially critical for applications with short data blocks.
- The findings contribute to the advancement of efficient and reliable coding techniques in digital communications.
Related Concept Videos
Design Example
317
The innovation of touch-tone telephony revolutionized the telecommunications industry by replacing the traditional rotary dial with a dual-tone multi-frequency (DTMF) signaling system. This system uses a matrix-style keypad with buttons arranged in four rows and three columns, creating 12 distinct signals each assigned to a pair of frequencies. Each button press results in a simultaneous generation of two sinusoidal tones – one from a low-frequency group (697 to 941 Hz) and one from a...
317
Design Example: Capacitance Multiplier Circuit
714
In integrated circuit technology, a capacitance multiplier is often utilized to produce a larger capacitance value when a small physical capacitance falls short. This is achieved by a circuit that multiplies capacitance values by a factor of up to 1000, such that a 10-pF capacitor can replicate the performance of a 100-nF capacitor.
The circuit illustrated in Figure 1 below incorporates two op-amps, with the first operating as a voltage follower and the second acting as an inverting amplifier.
The circuit illustrated in Figure 1 below incorporates two op-amps, with the first operating as a voltage follower and the second acting as an inverting amplifier.
714
Clipper Circuit
358
A clipper circuit is a fundamental wave-shaping device that harnesses the unique properties of diodes to alter and control waveform characteristics. This technology is widely used in electronic devices, especially in television and radar communication systems, where it enhances waveform modulation in both transmitters and receivers.
The operation of a clipper circuit can be exemplified by analyzing a dual-clipper configuration setup that integrates two ideal diodes, each paired with a biasing...
The operation of a clipper circuit can be exemplified by analyzing a dual-clipper configuration setup that integrates two ideal diodes, each paired with a biasing...
358
Signal Flow Graphs
190
Signal-flow graphs offer a streamlined and intuitive approach to representing control systems, providing an alternative to traditional block diagrams. These graphs use branches to symbolize systems and nodes to represent signals, effectively illustrating the relationships and interactions within the system.
In a signal-flow graph, branches denote the system's transfer functions, while nodes represent the signals. The direction of signal flow is indicated by arrows, with the corresponding...
In a signal-flow graph, branches denote the system's transfer functions, while nodes represent the signals. The direction of signal flow is indicated by arrows, with the corresponding...
190
The Y-to-Delta Circuit
406
A balanced wye-to-delta circuit comprises balanced Y-connected voltage sources and delta-connected loads with no neutral line connection.
The initial step in analyzing a wye-to-delta circuit is to assume a positive phase sequence. These phase voltages are then utilized to calculate the line voltages that occur directly across the delta-connected load impedances. Van, Vbn, and Vcn are the phase voltages in wye, and Vab, Vbc, and Vca are the line voltages for a delta circuit. The relation between...
The initial step in analyzing a wye-to-delta circuit is to assume a positive phase sequence. These phase voltages are then utilized to calculate the line voltages that occur directly across the delta-connected load impedances. Van, Vbn, and Vcn are the phase voltages in wye, and Vab, Vbc, and Vca are the line voltages for a delta circuit. The relation between...
406
Clamper Circuit
365
A clamper circuit, also known as a DC restorer, represents a specialized variant of the rectifier circuit, notable for its method of taking the output across the diode rather than the capacitor. This configuration lends to several distinctive applications, particularly in handling square wave inputs.
Within this circuit, the diode's orientation prompts the capacitor to charge up to the level of the most negative peak of the input signal. Upon reaching this state, the diode ceases to...
Within this circuit, the diode's orientation prompts the capacitor to charge up to the level of the most negative peak of the input signal. Upon reaching this state, the diode ceases to...
365

