An efficient leakage power optimization framework based on reinforcement learning with graph neural network.

Area of Science:

• Electrical Engineering
• Computer Science
• Artificial Intelligence

Background:

• Threshold voltage (Vth) assignment is crucial for optimizing leakage power in integrated circuits.
• The Vth assignment problem is NP-hard, posing significant challenges for large-scale circuit designs.
• Existing machine learning approaches aim to balance leakage reduction and runtime speed without causing timing violations.

Purpose of the Study:

• To propose a novel leakage power optimization framework using reinforcement learning (RL) and graph neural networks (GNNs).
• To formulate Vth assignment as an RL process, leveraging GNNs to learn circuit characteristics.
• To achieve a trade-off between leakage power reduction and runtime speed-up without inducing timing violations.

Main Methods:

• A reinforcement learning (RL) framework integrated with graph neural networks (GNNs) was developed.
• GNNs were used to learn timing and physical characteristics of circuit instances.
• Multiple non-overlapped instances were selected per RL action iteration to enhance convergence and decouple timing dependencies.

Main Results:

• The proposed framework demonstrated superior leakage power optimization compared to prior non-analytical and GNN-based methods, achieving an additional 5% to 17% reduction.
• Results were highly consistent with commercial tools.
• The trained framework, when applied to unseen circuits, maintained similar leakage optimization levels and achieved a runtime speed-up of 5.7x to 8.5x compared to commercial tools.

Conclusions:

• The RL-based framework effectively optimizes leakage power in large-scale circuit designs.
• The integration of GNNs enables efficient learning of circuit characteristics for Vth assignment.
• The approach offers a promising solution for balancing performance and power efficiency in modern chip design.