An Energy-Efficient and Artifact-Resilient ASIC for Simultaneous Neural Recording and Optogenetic Stimulation

This paper presents an application-specific integrated circuit (ASIC) fabricated using the CMOS 180 nm process to perform simultaneous neural recording and optogenetic stimulation. To perform effective optogenetic stimulation, the ASIC features an advanced switched-capacitor-based stimulation (SCS) driver, called voltage-boosting SCS (VB-SCS). The VB-SCS can drive LED with large current pulses up to 8 mA while reducing the required supply voltage by half, facilitating wireless power reception. To prevent saturation from stimulation-induced artifacts, the ASIC integrates a direct digitizing recording frontend with a high-resolution delta-sigma (ΔΣ) analog-to-digital converter (ADC) that directly digitizes neural signals with a large input dynamic range. This ΔΣ ADC involves a Gm-C integrator followed by a noise-shaping (NS) successive approximation register (SAR) quantizer. Measurement results indicate that this ΔΣ ADC-based direct digitizing frontend can tolerate large artifacts up to 300 mV_PP while linearly digitizing neural signals with an effective number of bits (ENOB) of 11.4 bits, consuming 10.8 µW. The ASIC, together with its associated passive components, was assembled into a headstage for in vivo verification, successfully demonstrating the functionality of the ASIC.