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Published on: April 12, 2018
Janus Electronic Devices with Ultrathin High-κ Gate Dielectric Directly Integrated on 1T'-MoTe2
Enzi Chen1, Qing Zhu1, Yaoyu Duan2
1State Key Laboratory of Optoelectronic Materials and Technologies, School of Electronics and Information Technology and Guangdong Province Key Laboratory of Display Material, Sun Yat-sen University, Guangzhou 510275, China.
Abstract:
Integrating high-quality dielectrics with two-dimensional (2D) transition metal chalcogenides (TMDCs) is crucial for high-performance electronics. However, the lack of dangling bonds on 2D material surfaces complicates direct dielectric deposition. We propose using atomic layer deposition (ALD) to integrate ultrathin high-κ dielectric directly on 1T'-MoTe2 surfaces, facilitating the creation of high-performance back-gated field-effect transistors (FETs). Exploiting 1T'-MoTe2's natural oxidation in ambient conditions, we directly deposit dense and uniform HfO2 dielectric films below 5 nm, achieving an equivalent oxide thickness (EOT) of 0.97 nm. The resulting back-gate transistors, with a monolayer MoSSe on HfO2/1T'-MoTe2, show a current on/off ratio over 105 and operate at low voltages (<1 V), indicating high gating efficiency and a charge carrier mobility of 2.93 cm2V-1s-1. Additionally, we demonstrate a 6 × 5 bottom-gated array of MoSSe transistors using all-1T'-MoTe2 electrodes, achieving an 86.7% sample yield. Our approach also enables the creation of various integrated logic circuits such as inverters, NAND, and NOR gates. This research offers a feasible method for integrating high-κ dielectric films using industrially compatible ALD processes, providing excellent thickness control, uniformity, and scalability for 2D electronic devices.
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