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Image Processing Hardware Acceleration-A Review of Operations Involved and Current Hardware Approaches
Costin-Emanuel Vasile1, Andrei-Alexandru Ulmămei1, Călin Bîră1
1Department of Electronic Devices, Circuits and Architectures, National University of Science and Technology Politehnica Bucharest, 060042 Bucharest, Romania.
Abstract:
This review provides an in-depth analysis of current hardware acceleration approaches for image processing and neural network inference, focusing on key operations involved in these applications and the hardware platforms used to deploy them. We examine various solutions, including traditional CPU-GPU systems, custom ASIC designs, and FPGA implementations, while also considering emerging low-power, resource-constrained devices.
