A high performance heterogeneous hardware architecture for brain computer interface

Brain-computer interface (BCI) has been widely used in human-computer interaction. The introduction of artificial intelligence has further improved the performance of BCI system. In recent years, the development of BCI has gradually shifted from personal computers to embedded devices, which boasts lower power consumption and smaller size, but at the cost of limited device resources and computing speed, thus can hardly improve the support of complex algorithms. This paper proposes a heterogeneous BCI architecture based on ARM + FPGA, enabling real-time processing of electroencephalogram (EEG) signals. Adopting data quantization, layer fusion and data augmentation to optimize the compact neural network model EEGNet, and design dedicated hardware engines to accelerate the network. Experimental results show that the system achieves 93.3% classification accuracy for steady-state visual evoked potential signals, with a time delay of 0.2 ms per trail, and a power consumption of approximately (1.91 W). That is 31.5 times faster acceleration is realized at the cost of only 0.7% lower accuracy compared with the conventional processor. The results show that the BCI architecture proposed in this study has strong practicability and high research significance.