Search research articles

ABOUT JoVE

Overview Leadership Blog JoVE Help Center

AUTHORS

Publishing Process Editorial Board Scope & Policies Peer Review FAQ Submit

LIBRARIANS

Testimonials Subscriptions Access Resources Library Advisory Board FAQ

RESEARCH

JoVE Journal Methods Collections JoVE Encyclopedia of Experiments Archive

EDUCATION

JoVE Core JoVE Business JoVE Science Education JoVE Lab Manual Faculty Resource Center Faculty Site

Terms & Conditions of Use

Related Concept Videos

Parallel Processing

Parallel Processing

The brain processes sensory information rapidly due to parallel processing, which involves sending data across multiple neural pathways at the same time. This method allows the brain to manage various sensory qualities, such as shapes, colors, movements, and locations, all concurrently. For instance, when observing a forest landscape, the brain simultaneously processes the movement of leaves, the shapes of trees, the depth between them, and the various shades of green. This enables a quick and...

You might also read

Related Articles

Articles linked to this work by shared authors, journal, and citation graph.

Sort by

Same author

A structured participatory preference-tuning and VR-based framework for age-friendly spatial configuration: quantifying short-term psychophysiological responses and immediate affective states through dynamic virtual environment adaptation.

Frontiers in psychology·2026

Same author

Corrigendum to "Total saponins from Panax japonicus mediate the paracrine interaction between adipocytes and macrophages to promote lipolysis in the adipose tissue during aging via the NLRP3 inflammasome/GDF3/ATGL axis" [ Phytomedicine 136 (2025)/156304].

Phytomedicine : international journal of phytotherapy and phytopharmacology·2026

Same author

Clinical Practice Guideline for Spontaneous Isolated Superior Mesenteric Artery Dissection (2025 Edition).

Annals of vascular surgery·2026

Same author

Predictive Value of Imaging-Based Classifications for Conservative Management Failure in Isolated Superior Mesenteric Artery Dissection.

JACC. Asia·2026

Same author

Protective effects of a commercial total flavonoid preparation from <i>Puerariae Lobatae Radix</i> on exhaustive exercise-induced liver injury in mice.

Frontiers in pharmacology·2026

Same author

Clinical analysis of 21 cases of chlorfenapyr poisoning.

Clinical toxicology (Philadelphia, Pa.)·2026

Same journal

Multi-Scale convolutional neural networks integrated with self-attention for motor imagery EEG decoding.

Biomedical engineering letters·2026

Same journal

Low-power analog and mixed-signal circuit techniques for next-generation miniature implantable neural interface systems.

Biomedical engineering letters·2026

Same journal

Advances in semiconductor materials and device architectures for biomedical systems: a mini review.

Biomedical engineering letters·2026

Same journal

A Multi-perception fusion using shared-control method for brain-mobile robot.

Biomedical engineering letters·2026

Same journal

SSA-DCNet: a cross-session MI-EEG classification network based on deformable convolution and spatial-shift attention.

Biomedical engineering letters·2026

Same journal

Advanced silicon nanomembrane based bioelectronics for flexible and stretchable implantable systems.

Biomedical engineering letters·2026

See all related articles

Search research articles

Related Experiment Video

Updated: Jun 3, 2025

A Single-Channel and Non-Invasive Wearable Brain-Computer Interface for Industry and Healthcare

A Single-Channel and Non-Invasive Wearable Brain-Computer Interface for Industry and Healthcare

Published on: July 7, 2023

A high performance heterogeneous hardware architecture for brain computer interface.

Zhengbo Cai¹, Penghai Li¹, Longlong Cheng²

¹School of Integrated Circuit Science and Engineering, Tianjin University of Technology, Tianjin, 300384 People's Republic of China.

Biomedical Engineering Letters

|January 9, 2025

Summary

This summary is machine-generated.

This study introduces a novel heterogeneous Brain-Computer Interface (BCI) architecture for embedded devices. The system achieves high accuracy and speed for electroencephalogram (EEG) signal processing, overcoming resource limitations.

Keywords:

Brain-computer interface (BCI)Electroencephalogram (EEG)Field-programmable gate-array (FPGA)Hardware accelerator

More Related Videos

An Experimental Platform to Study the Closed-loop Performance of Brain-machine Interfaces

An Experimental Platform to Study the Closed-loop Performance of Brain-machine Interfaces

Published on: March 10, 2011

Brain-Computer Interface-controlled Upper Limb Robotic System for Enhancing Daily Activities in Stroke Patients

Brain-Computer Interface-controlled Upper Limb Robotic System for Enhancing Daily Activities in Stroke Patients

Published on: April 18, 2025

Related Experiment Videos

Last Updated: Jun 3, 2025

A Single-Channel and Non-Invasive Wearable Brain-Computer Interface for Industry and Healthcare

A Single-Channel and Non-Invasive Wearable Brain-Computer Interface for Industry and Healthcare

Published on: July 7, 2023

An Experimental Platform to Study the Closed-loop Performance of Brain-machine Interfaces

An Experimental Platform to Study the Closed-loop Performance of Brain-machine Interfaces

Published on: March 10, 2011

Brain-Computer Interface-controlled Upper Limb Robotic System for Enhancing Daily Activities in Stroke Patients

Brain-Computer Interface-controlled Upper Limb Robotic System for Enhancing Daily Activities in Stroke Patients

Published on: April 18, 2025

Area of Science:

Neuroscience
Computer Engineering
Artificial Intelligence

Background:

Brain-computer interfaces (BCIs) are crucial for human-computer interaction, with AI enhancing performance.
Transitioning BCIs to embedded devices offers lower power and size but faces resource and speed constraints for complex algorithms.

Purpose of the Study:

To propose a heterogeneous BCI architecture optimized for embedded systems.
To enable real-time processing of electroencephalogram (EEG) signals on resource-limited devices.

Main Methods:

Developed an ARM+FPGA heterogeneous BCI architecture.
Optimized the EEGNet model using data quantization, layer fusion, and data augmentation.
Designed dedicated hardware engines for neural network acceleration.

Main Results:

Achieved 93.3% classification accuracy for steady-state visual evoked potential (SSVEP) signals.
Realized a low time delay of 0.2 ms per trial and power consumption of 1.91 W.
Demonstrated a 31.5x acceleration compared to conventional processors with a minimal accuracy drop (0.7%).

Conclusions:

The proposed heterogeneous BCI architecture is practical for embedded systems.
This approach significantly enhances EEG signal processing speed and efficiency.
The study highlights the potential of hardware-software co-design for advanced BCI applications.