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Proportional Integral (PI) controllers are a fundamental component in modern control systems, widely used to enhance performance and mitigate steady-state errors. They are particularly effective in applications such as automatic brightness adjustment on smartphones, where they excel at mitigating steady-state errors for step-function inputs. Unlike PD controllers, which require time-varying errors to function optimally, PI controllers leverage their integral component to address residual...

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A PFM-Based Calibration Method for Low-Power High-Linearity Digital Pixel.

Yu Cheng1, Jionghan Liu1, Xiyuan Wang1

  • 1School of Integrated Circuits, Dalian University of Technology, Dalian 116000, China.

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Summary
This summary is machine-generated.

This study addresses pixel nonlinearity to reduce power consumption in digital readout integrated circuits (DROICs). An off-chip calibration method improved linearity to 99.6%, achieving low static power consumption of 6 μW per pixel.

Keywords:
DROICPFMPbSedigital pixel

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Area of Science:

  • Integrated Circuit Design
  • Low-Power Electronics
  • Image Sensor Technology

Background:

  • Pixel-level nonlinearity in digital circuits hinders power consumption reduction.
  • Static current in capacitive transimpedance amplifiers (CTIAs) and comparators is a primary cause of nonlinearity.

Purpose of the Study:

  • To investigate the causes of nonlinearity in digital pixels.
  • To achieve low power consumption in pixel-level circuits.
  • To improve the linearity of digital readout integrated circuits (DROICs).

Main Methods:

  • Analysis of nonlinearity causes in digital pixels.
  • Reduction of static current in capacitive transimpedance amplifiers (CTIAs) and comparators.
  • Implementation of an off-chip calibration method for linearity enhancement.
  • Fabrication of a 64 × 64 array prototype DROIC using a 0.18 μm 1P6M CMOS process.

Main Results:

  • Successfully identified the main causes of nonlinearity.
  • Achieved improved linearity through off-chip calibration.
  • Demonstrated a post-calibration linearity of 99.6% for input currents up to 1.5 μA.
  • Attained a static power consumption of 6 μW per digital pixel.

Conclusions:

  • The developed off-chip calibration method effectively mitigates pixel nonlinearity.
  • The fabricated DROIC exhibits high linearity and low power consumption, suitable for advanced imaging applications.
  • This research offers a viable solution for enhancing the performance of digital readout integrated circuits.