Memristive ternary Łukasiewicz logic based on reading-based ratioed resistive states (3R)

Area of Science:

• Materials Science
• Computer Science
• Electrical Engineering

Background:

• The demand for efficient computational methods drives research into Computation in Memory (CIM).
• Multi-valued logic systems, particularly ternary logic, offer potential for increased storage density and computational efficiency compared to binary logic.
• Resistive Random-Access Memory (ReRAM) devices possess multi-level programming capabilities suitable for CIM integration.

Purpose of the Study:

• To investigate the feasibility of implementing ternary logic within the CIM paradigm using ReRAM devices.
• To evaluate the suitability of ternary Łukasiewicz logic for signal mapping and voltage-based computation in ReRAM crossbar arrays.
• To analyze the impact of device variability and explore parallel operation capabilities in ReRAM-based ternary CIM.

Main Methods:

• Implementation of ternary Łukasiewicz logic using ReRAM devices in 1T1R crossbar arrays.
• Validation on an integrated ReRAM chip (Memory Advanced Demonstrator 200 mm).
• Investigation of memristive device variability and parallel operation potential.

Main Results:

• Demonstrated the feasibility of ternary logic operations within ReRAM-based CIM.
• Confirmed the suitability of ternary Łukasiewicz logic for voltage-reading-based computation.
• Assessed the influence of device variability on logical computation accuracy and parallel processing capabilities.

Conclusions:

• Ternary logic integrated with ReRAM is a viable approach for advancing Computation in Memory.
• The proposed method offers enhanced storage and computational efficiency, paving the way for future computing platforms.
• Further research into device variability and parallel operations is crucial for optimizing ReRAM-based ternary CIM systems.