Protected memristive implementations of cryptographic functions

Memristive technology mitigates the memory wall issue in von Neumann architectures by enabling in-memory data processing. Unlike traditional complementary metal-oxide semiconductor (CMOS) technology, memristors provide a new paradigm for implementing cryptographic functions and security considerations. While prior research explores memristors for cryptographic functions and side-channel attack vulnerabilities, our study uniquely addresses memristor-oriented countermeasures. We review different memristive crossbar configurations, implement a four-bit S-box cryptographic function, and analyse memristor-oriented hiding and masking techniques using a self-rectifying passive crossbar. Our findings confirm the efficacy of memristor-oriented hiding techniques but highlight limitations in memristor-oriented masked dual-rail pre-charge logic (MDPL) masking methods. Effective MDPL masking depends on specific power consumption conditions, i.e. the power profile of input data '01' and '10' are not clearly distinguishable from '00' and '11', which, however, are not satisfied across various memristive logic families. Despite passing t-tests, xor4Sbox with CRS-based MDPL masking failed stochastic approaches owing to power consumption differences. Our study prioritizes memristor-oriented countermeasures, advancing the understanding of challenges and opportunities in memristive technology for cryptographic functions.This article is part of the theme issue 'Emerging technologies for future secure computing platforms'.