Mixed-Dimensional Semiconductors-Based Ternary Circuits with Tunable Negative Transconductance Characteristics

Multivalued logic (MVL) systems, in which data are processed with more than two logic values, are considered a viable solution for achieving superior processing efficiency with higher data density and less complicated system complexity without further scaling challenges. Such MVL systems have been conceptually realized by using negative transconductance (NTC) devices whose channels consist of van der Waals (vdW) heterojunctions of low-dimensional semiconductors; however, their circuit operations have not been quite ideal for driving multiple stages in real circuit applications due to reasons such as a reduced output swing and poorly defined logic states. Herein, we demonstrate ternary inverter circuits with near rail-to-rail swing and three distinct logic states by employing vdW p-n heterojunctions of single-walled carbon nanotubes (SWCNT) and MoS₂ where the SWCNT layer completely covers the MoS₂ layer. In particular, SWCNTs are inkjet printed to form heterojunctions with MoS₂ grown by chemical vapor deposition (CVD), and both inkjet printing and CVD are fully scalable device fabrication methods for low-dimensional materials. In addition, the NTC characteristics of heterojunction field-effect transistors (H-FETs) are explained based on the electrical characteristics of individual SWCNT and MoS₂ channels. By adjustment of the p-channel characteristics in H-FETs by exploiting the advantages of the inkjet printing technology, the widths of the NTC regions are easily adjusted accordingly. The extended NTC region enables stable middle logic state operations of low-dimensional semiconductors-based ternary inverters over a sufficiently wide input voltage range.