Design of Interface ASIC with Power-Saving Switches for Capacitive Accelerometers.

Area of Science:

• Electrical Engineering
• Materials Science
• Sensor Technology

Background:

• Micro-Electro-Mechanical Systems (MEMS) accelerometers are crucial for civilian applications.
• Closed-loop accelerometers using switched-capacitor (SC) circuits offer low power and high SNR.
• Modern geophones require high-precision, low-power MEMS accelerometers.

Purpose of the Study:

• To design and implement a closed-loop interface Application-Specific Integrated Circuit (ASIC) for MEMS accelerometers.
• To address the demand for high-precision and low-power accelerometers in geophone systems.
• To optimize power consumption and enhance the dynamic range of the accelerometer interface.

Main Methods:

• Utilized switched-capacitor modulation technology for the interface circuit.
• Incorporated a low-noise charge amplifier, sample-and-hold circuit, integrator, and clock divider.
• Employed a switched operational amplifier (op-amp) technique to minimize power consumption.
• Implemented a class-AB output stage to improve dynamic range.
• Fabricated the design using a standard 0.35 μm CMOS process.

Main Results:

• Achieved a power consumption of 3.3 mW under a 3.3 V supply.
• Demonstrated an accelerometer noise density below 1 μg/√Hz.
• Obtained a sensitivity of 1.65 V/g and a measurement range of ±1 g.
• Reported nonlinearity of 0.15%, bandwidth of 300 Hz, and bias stability of ~36 μg.

Conclusions:

• The proposed switched-capacitor interface ASIC effectively meets stringent requirements for high-precision MEMS accelerometers.
• The design demonstrates a viable solution for low-power, high-performance accelerometer applications in geophones.
• The achieved performance metrics validate the efficacy of the implemented design techniques.