A Carbon Nanotube Transistor Based on Buried-Gate Structure

Area of Science:

• Materials Science
• Nanotechnology
• Electrical Engineering

Background:

• Large-scale fabrication of high-purity semiconductor carbon nanotubes (CNTs) is crucial for advancing CNT-based electronics.
• Carbon nanotube transistors (CNT) offer potential for next-generation electronic devices due to their unique properties.

Purpose of the Study:

• To present a novel carbon nanotube transistor (CNT) with a buried-gate structure.
• To optimize device performance through an etching process for enhanced surface flatness.

Main Methods:

• Fabrication of a CNT thin-film transistor utilizing a buried-gate design.
• Implementation of an etching process to improve the surface topography of the CNT device.

Main Results:

• The developed CNT thin-film transistor exhibits a high current switching ratio of 10^4.
• Achieved a threshold voltage of approximately 1 V and electron mobility up to 6.95 cm^2/V·s.
• Demonstrated excellent electrical performance and low-voltage operation.

Conclusions:

• The optimized CNT transistor design shows significant potential for high-performance electronic applications.
• Low-voltage operation facilitates the development of compact and portable electronic devices.
• This work contributes to the practical realization of large-scale CNT fabrication for commercial use.