Van der Waals Engineering of One-Transistor-One-Ferroelectric-Memristor Architecture for an Energy-Efficient...

Area of Science:

• Materials Science
• Nanotechnology
• Solid State Physics

Background:

• Two-dimensional (2D) material-based memristor arrays are crucial for data-centric applications like AI.
• Challenges include individual cell access and controlling sneak currents in these arrays.

Purpose of the Study:

• To develop a van der Waals engineering approach for creating one-transistor-one-memristor (1T1M) cells.
• To address challenges in accessing individual memristor cells and managing sneak current paths.

Main Methods:

• Assembling 2D ferroelectric CuCr2S6 with MoS2 and h-BN using van der Waals engineering.
• Fabricating one-transistor-one-memristor (1T1M) cells.
• Demonstrating a neuromorphic array with reduced crosstalk.

Main Results:

• Achieved high resistance tunability (10^6) and extremely low sneak current (120 fA).
• Demonstrated low static power consumption (12 fW).
• Experimental validation of a neuromorphic array with significantly reduced crosstalk.

Conclusions:

• The van der Waals engineering approach provides a universal solution for 2D in-memory computing systems.
• The developed 1T1M cells are compact and energy-efficient, suitable for next-generation artificial neural networks.
• Electric-field-induced ferroelectric polarization reversal drives the nonvolatile resistance switching.