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Demonstration of Integrated Quasi-Vertical DMOS Compatible with the Bipolar-CMOS-DMOS Process Achieving Ultralow

Feng Lin1,2, Tuanzhuang Wu1, Weidong Wang1

  • 1National ASIC System Engineering Research Center, School of Integrated Circuits, Southeast University, Nanjing 210096, China.

Nanomaterials (Basel, Switzerland)
|February 13, 2025
PubMed

Keywords:
BCD processDMOSSGTquasi-vertical structurespecific ON-state resistance

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