Photolithography-Induced Doping and Interface Modulation for High-Performance Monolayer WSe₂ P-Type Transistors

Area of Science:

• Materials Science
• Condensed Matter Physics
• Nanotechnology

Background:

• Fermi-level pinning (FLP) hinders performance in 2D transition metal dichalcogenide (TMC) devices.
• Efficient charge carrier injection is crucial for high-performance 2D transistors.

Purpose of the Study:

• To mitigate FLP in 2D TMCs and enhance hole carrier concentration.
• To improve contact resistance in monolayer WSe2 p-type field-effect transistors (p-FETs).

Main Methods:

• Formation of a 1.8 nm-thick p-doping layer via photolithography.
• Utilizing helium ion-beam lithography for further device modification.
• Employing MoO3 encapsulation for enhanced p-doping.

Main Results:

• Reduced contact resistance (Rc) to ~4.8 kΩ·μm in monolayer WSe2 p-FETs.
• Increased hole carrier concentration by 1.4 times, achieving mobility of ~75 cm²/V·s.
• Achieved ultralow Rc of ~0.8 kΩ·μm and high on-state current density (420 μA/μm).

Conclusions:

• The developed surface treatment effectively mitigates FLP and enhances device performance.
• Monolayer WSe2 p-FETs demonstrate performance comparable to 2D n-FETs.
• This approach paves the way for high-performance complementary metal-oxide semiconductor transistors with 2D channels.