A Hardware Accelerator for Real-Time Processing Platforms Used in Synthetic Aperture Radar Target Detection Tasks

Area of Science:

• Artificial Intelligence
• Computer Engineering
• Remote Sensing

Background:

• Deep learning object detection algorithms are crucial for Synthetic Aperture Radar (SAR) image analysis.
• Real-time monitoring necessitates on-platform processing of SAR data, but current GPU solutions exceed power budgets for airborne/satellite applications.

Purpose of the Study:

• To design a low-power, low-latency accelerator for deep learning-based SAR object detection.
• To enable real-time target detection on power-constrained airborne and satellite SAR platforms.

Main Methods:

• Developed a Process Engine (PE) for efficient multidimensional convolution parallel computing on Field-Programmable Gate Arrays (FPGAs).
• Implemented a unique memory arrangement and FPGA-suitable dataflow patterns to optimize memory access and reduce latency.
• Deployed the Yolov5s SAR object detection algorithm on a Virtex 7 690t chip-based accelerator.

Main Results:

• The accelerator achieved a dynamic power consumption of only 7 watts.
• Real-time detection capability of 52.19 images per second for 512x512 SAR images was demonstrated.
• Significant reduction in convolution computing time and overall latency was achieved.

Conclusions:

• The designed accelerator effectively meets the low-power and low-latency requirements for real-time SAR object detection on airborne and satellite platforms.
• This work enables efficient, on-board analysis of SAR imagery, advancing real-time monitoring capabilities.