A Fully Integrated Memristive Chaotic Circuit Based on Memristor Emulator with Voltage-Controlled Oscillator

Area of Science:

• Integrated Circuits
• Nonlinear Dynamics
• Chaos Theory

Background:

• Traditional chaotic circuits often use discrete components, leading to larger footprints and higher power consumption.
• There is a need for compact and power-efficient chaotic circuits for various applications.

Purpose of the Study:

• To introduce a fully integrated memristive chaotic circuit.
• To demonstrate reduced power consumption and a smaller chip area compared to discrete implementations.

Main Methods:

• The circuit utilizes a voltage-controlled oscillator (VCO) for signal generation and a memristor emulator as the nonlinear element.
• The memristor emulator is built using an operational transconductance amplifier (OTA), two transistors, and a capacitor.
• The VCO incorporates a dual delay unit and current compensation for enhanced frequency and tunability.

Main Results:

• The fabricated circuit occupies a chip area of 0.0072 mm² using the SMIC 180 nm CMOS process.
• The memristor emulator operates up to 300 MHz.
• The chaotic circuit produces signals from 158 MHz to 286 MHz with a power consumption of 3.5553 mW at 0.9 V.
• The Lyapunov exponent ranges from 0.2572 to 0.4341.

Conclusions:

• The proposed fully integrated memristive chaotic circuit offers a compact and power-efficient solution.
• The design demonstrates effective generation of chaotic oscillatory signals with a tunable frequency range.
• This work contributes to the development of integrated chaotic systems for potential applications.