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Interfacial Thermal Transport and Energy Dissipation in Multilayer PdSe2 Field Effect Transistors.
Jiaqiu Xie1, Zehao Yu1, Yuanchen Sun1
1Phonon Engineering Research Center of Jiangsu Province, Ministry of Education Key Laboratory of NSLSCS, Center for Quantum Transport and Thermal Energy Science, Institute of Physics Frontiers and Interdisciplinary Sciences, School of Physics and Technology, Nanjing Normal University, Nanjing, 210023, China.
This study explores energy dissipation in palladium diselenide (PdSe2) field-effect transistors (FETs). PdSe2 FETs show high current density and low thermal boundary conductance, suggesting performance improvements through interface optimization.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Nanotechnology
Background:
- Miniaturization of 2D electronic circuits increases power density, causing heat issues.
- Thermal breakdown in 2D semiconductor field-effect transistors (FETs) challenges optimal performance.
- Understanding energy dissipation is crucial for advanced electronic devices.
Purpose of the Study:
- Investigate energy dissipation in multilayer palladium diselenide (PdSe2) field-effect transistors (FETs) for the first time.
- Analyze high-field breakdown behavior and thermal properties of PdSe2 FETs.
- Provide insights for designing high-performance PdSe2 electronic and optoelectronic devices.
Main Methods:
- Fabrication and characterization of multilayer PdSe2 FETs on SiO2/Si substrates.
- High-field electrical breakdown measurements to determine current density limits.
- Raman thermometry to measure thermal boundary conductance (TBC) at the PdSe2/SiO2 interface.
Main Results:
- PdSe2 FETs exhibit a maximum current density of approximately 2.74 MA cm⁻², comparable to black phosphorus FETs and five times higher than MoS2 FETs.
- The thermal boundary conductance (TBC) at the PdSe2/SiO2 interface is measured to be around 12-13 MW m⁻² K⁻¹.
- This TBC value is relatively low compared to other solid-solid interfaces.
Conclusions:
- PdSe2 FETs demonstrate promising high-current carrying capabilities.
- The low TBC at the PdSe2/SiO2 interface presents an opportunity for performance enhancement.
- Optimizing the thermal interface is key to unlocking the full potential of PdSe2-based devices.
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