Related Experiment Video
Updated: May 15, 2025

Atomic Layer Deposition of Vanadium Dioxide and a Temperature-dependent Optical Model
Published on: May 23, 2018
Low Hysteresis Vanadium Dioxide Integrated on Silicon Using Complementary Metal-Oxide Semiconductor Compatible Oxide
Swayam Prakash Sahoo1,2,3, Matthieu Bugnet4, Ingrid Cañero Infante5
1Ecole Centrale Lyon INSA Lyon Université Claude Bernard Lyon 1 CNRS Institut des Nanotechnologies de Lyon (INL) UMR 5270 69130 Ecully France.
Abstract:
VO2 undergoes a metal-insulator transition (MIT) at ≈70 °C, which induces large variations in its electrical and wavelength-dependent optical properties. These features make VO2 a highly sought-after compound for optical, thermal, and neuromorphic applications. To foster the development of VO2-based devices for the microelectronic industry, it is also imperative to integrate VO2 on silicon. However, high lattice mismatch and the formation of silicates at the interface between VO2 and Si degrade the quality and functionality of VO2 films. Moreover, VO2's polymorphic nature and stable V-O phases pose integration issues. To address these challenges, the MIT of VO2 thin films integrated on Si with a complementary metal-oxide semiconductor-compatible Hf Zr1- O2 (HZO) buffer layer is investigated. Using in situ high-resolution X-ray diffraction and synchrotron far-infrared spectroscopy, combined with multiscale atomic and electronic structure characterizations, it is demonstrated that VO2 on the HZO buffer layer exhibits an unusually low thermal hysteresis of ≈4 °C. In these results, the influence of strain on M2 phase nucleation, which controls the hysteresis, is unraveled. Notably, the rate of phase transition is symmetric and does not change for the heating and cooling cycles, implying no incorporation of defects during cycling, and highlighting the potential of an HZO buffer layer for reliable operation of VO2-based devices.
More Related Videos
09:49In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
Published on: May 13, 2020
06:57Theoretical Calculation and Experimental Verification for Dislocation Reduction in Germanium Epitaxial Layers with Semicylindrical Voids on Silicon
Published on: July 17, 2020
Related Concept Videos
MOS Capacitor
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
MOSFET: Enhancement Mode
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no...
Biasing of Metal-Semiconductor Junctions
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
MOSFET: Depletion Mode
The primary characteristic of depletion-mode MOSFETs is their ability to conduct current between the drain and source terminals without gate bias. This inherent conductivity...
MOSFET
In an n-MOSFET, the structure includes n-type source and drain...
Schottky Barrier Diode