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Enhanced convolutional neural network accelerators with memory optimization for routing applications.

Srikanth Prasad Nallabelli1, Sundar Sampath1

  • 1School of Electronics Engineering, Vellore Institute of Technology, Vellore, Tamil Nadu, India.

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This study introduces the Memory Optimized Zebra CNN (MOZC), an efficient Convolutional Neural Network (CNN) accelerator. MOZC significantly improves memory utilization and performance, achieving a high GOPS/W for enhanced digital applications.

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Area of Science:

  • Computer Engineering
  • Artificial Intelligence
  • Hardware Acceleration

Background:

  • Memory utilization is a critical challenge in Convolutional Neural Network (CNN) accelerators, often leading to system performance degradation.
  • Existing CNN accelerators face limitations in efficient memory management and data routing.
  • Optimizing memory usage is crucial for enhancing the overall efficiency and applicability of CNNs in digital systems.

Purpose of the Study:

  • To develop a novel CNN accelerator, the Memory Optimized Zebra CNN (MOZC), with a focus on optimizing memory utilization.
  • To improve the network routing function within CNN accelerators by adopting a shortest path strategy inspired by zebra stripe patterns.
  • To evaluate the performance and efficiency of the proposed MOZC system on Field-Programmable-Gate-Arrays (FPGAs).

Main Methods:

  • Designed a CNN accelerator incorporating an optimized network routing function inspired by zebra patterns to find shortest paths between nodes.
  • Implemented the Memory Optimized Zebra CNN (MOZC) system.
  • Evaluated MOZC performance on Field-Programmable-Gate-Arrays (FPGAs), measuring metrics including LUT, FF, memory utilization, power consumption, DSP usage, and Giga-Operations-Per-Second per watt (GOPS/W).
  • Assessed routing and data transmission robustness using data delivery and throughput parameters with video data.

Main Results:

  • The MOZC system demonstrated significant improvements in memory utilization and overall performance compared to conventional CNN accelerators.
  • Achieved a highest GOPS/W of 30.43, indicating substantial gains in energy efficiency.
  • Routing efficiency and data transmission robustness were validated using video data, confirming effective data delivery and throughput.
  • FPGA evaluation showed optimized resource utilization, including lookup tables (LUT), Flip-Flops (FF), and Digital-Signal Processing (DSP) blocks.

Conclusions:

  • The Memory Optimized Zebra CNN (MOZC) effectively addresses memory utilization challenges in CNN accelerators.
  • The zebra-inspired routing strategy enhances efficiency and robustness, leading to superior performance metrics.
  • MOZC represents a significant advancement in developing high-performance and memory-efficient CNN hardware accelerators, particularly for FPGA implementations.