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This study introduces a novel hyper-heuristic optimizer with an ensemble estimator for printed circuit board assembly line scheduling (PCBALS). The method significantly improves efficiency and solution quality for complex electronic manufacturing tasks.

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Area of Science:

Industrial Engineering
Operations Research
Manufacturing Systems

Background:

Printed circuit board assembly line scheduling (PCBALS) is a complex optimization problem in electronics manufacturing.
Inefficient scheduling leads to significant differences in assembly times and reduced production efficiency.
Existing methods struggle with the unique challenges of surface mounter allocation.

Purpose of the Study:

To develop an advanced optimization algorithm for PCBALS.
To improve the efficiency and accuracy of assembly time estimation.
To enhance the overall quality of solutions for electronic assembly line scheduling.

Main Methods:

Proposed a hyper-heuristic optimizer embedded with a multifeature fusion ensemble estimator (HHO-MFEE).
Developed a min-max integer model for small-scale PCBALS.
Implemented seven data- and target-driven heuristics for component allocation.
Introduced an ensemble assembly time estimator incorporating multifeature coding.

Main Results:

HHO-MFEE achieved solution gaps of 3.44%–7.28% compared to optimal solutions for small-scale problems.
The proposed time estimator demonstrated high accuracy (MAE 2.01% training, 3.43% testing), outperforming existing methods.
HHO-MFEE showed superior performance over state-of-the-art algorithms, with average improvements of 7.21%–9.47%.

Conclusions:

The HHO-MFEE algorithm offers a robust and effective solution for PCBALS.
The multifeature fusion ensemble estimator significantly enhances assembly time prediction accuracy.
This approach provides substantial improvements in efficiency and solution quality for electronic assembly lines.