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Field Effect Transistor

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Field-effect transistors (FETs) are integral to electronic circuits and distinguished by their three-terminal setup: the gate, drain, and source. These transistors operate as unipolar devices, which utilize either electrons or holes as charge carriers, in contrast to bipolar transistors, which use both types of carriers. The primary function of the FET is to modulate the flow of these carriers from the source to the drain through a channel. The voltage difference between the gate and source...

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Related Experiment Video

Updated: May 9, 2025

Fabrication of Schottky Diodes on Zn-polar BeMgZnO/ZnO Heterostructure Grown by Plasma-assisted Molecular Beam Epitaxy

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An area and power efficient ternary serial adder using phase composite ZnO stack channel FETs.

Kiyung Kim¹, Sunmean Kim², So-Young Kim¹

¹Department of Electrical Engineering, Pohang University of Science and Technology Cheongam-ro 77, Nam-gu Pohang Gyeongbuk 37673 Republic of Korea bhlee1@postech.ac.kr.

Nanoscale Advances

|May 1, 2025

Summary

Ternary stack channel field-effect transistors (SCFETs) enable multi-valued logic, significantly reducing device count and power consumption in circuits. This research demonstrates their potential for highly efficient, low-power electronic applications.

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Area of Science:

Semiconductor device physics
Digital logic design
Low-power electronics

Background:

Multi-valued logic offers potential for reduced circuit complexity and power consumption compared to binary logic.
Stack channel field-effect transistors (SCFETs) are emerging devices with tunable characteristics.

Purpose of the Study:

To investigate the use of ternary SCFETs for realizing multi-valued logic circuits.
To design and simulate a ternary full adder using SCFETs.

Main Methods:

Modulating ZnO layer thickness in SCFETs to control device parameters.
Modeling and simulating ternary circuits based on experimental SCFET data.
Designing a ternary full adder and analyzing its performance.

Main Results:

Ternary SCFETs were successfully fabricated and characterized.
A ternary full adder was designed using only 12 devices, a significant reduction from binary equivalents.
The ternary serial adder demonstrated a competitive power-delay product of approximately 7 fJ at 1V.

Conclusions:

SCFET-based ternary circuits are a viable and promising approach for extremely low-power applications.
The device count reduction and power efficiency highlight the potential of multi-valued logic with SCFETs.