High-Performance Polymer Monolayer Transistors with Sub-20 nm Channel Lengths

Area of Science:

• Materials Science
• Nanotechnology
• Electronics Engineering

Background:

• Scaling strategies significantly improve performance and reduce costs in silicon (Si) and 2D material field-effect transistors (FETs).
• High-performance downscaling of polymer FETs has remained a significant challenge in the field.

Purpose of the Study:

• To achieve high performance in polymer FETs through combined body thickness and channel length scaling.
• To demonstrate a polymer monolayer FET with dimensions comparable to state-of-the-art silicon FETs.

Main Methods:

• Employed body thickness scaling and channel length scaling strategies.
• Fabricated a 2.4-nm-thick polymer monolayer FET with an 18 nm channel length.
• Investigated short-channel effects by varying gate dielectric thickness and compared with Scale Length Theory.

Main Results:

• Achieved a polymer FET with an 18 nm channel length, comparable to the smallest technology node for planar Si FETs.
• Demonstrated good operational stability and reliability with an on-state current density of 2.4 × 10^-4 A µm^-1.
• Obtained a high intrinsic gate delay of 0.79 ps and an on/off current ratio of 10⁹.

Conclusions:

• Successful downscaling of polymer FETs is demonstrated, achieving performance metrics competitive with silicon technology.
• The results validate the application of Scale Length Theory in understanding short-channel effects in polymer FETs.
• This advancement opens possibilities for high-performance, low-cost polymer-based electronic devices.