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Published on: May 12, 2008
Three-Dimensional Architectures for Silicon Wafer-Based Integrated Microenergy Storage Systems
Fang Hu1, Xiang Xiang Fang1, Chuang Yue1,2
1Department of Microelectronics Science and Engineering, School of Physical Science and Technology, Ningbo University, Ningbo, 315211, China.
None:
Integrable silicon wafer-based (SW-based) on-chip micropower sources are essential for simultaneously embracing superior compatibility, high capacity, and long cyclability in powering microelectronic devices and micro/nano electro-mechanical systems (M/NEMS). Specifically, the SW-based microenergy devices in three-dimensional (3D) layout can significantly increase the surface area for loading more extra active material, thus achieving increased energy density within the limited footprint area. Additionally, the shortened electron/ion transporting path length would greatly boost the electrochemical kinetics, thereby enhancing the power density of the microenergy chip as well. In this review, the merits of the 3D SW-based microenergy storage systems are first introduced and proposed, and then the state-of-the-art strategies for fabricating various 3D SW-based architectures applied in microenergy devices are illustrated and summarized. Eventually, the recent advancements in 3D SW-based microenergy storage systems are comprehensively reviewed, and the challenges and prospects associated with the design of next-generation, high-performance 3D SW-based micropower supplies are discussed, which are expected to chart a course for the future practical implementation of these systems in micro/nano smart devices.
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