Related Experiment Video
Updated: Sep 19, 2025

Electric-field Control of Electronic States in WS2 Nanodevices by Electrolyte Gating
Published on: April 12, 2018
Hybrid-contact engineering for enhanced p-type performance in WSe2field-effect transistors
Zhe Chen1,2, Lanxin Xu2, Yingjie Zhao2
1School of Information Science and Technology, Fudan University, Shanghai 200433, People's Republic of China.
Researchers developed a hybrid-contact design for tungsten diselenide field-effect transistors (FETs). This innovation overcomes Fermi-level pinning, significantly boosting p-type performance and enabling efficient hole injection for advanced electronics.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Nanotechnology
Background:
- Fermi-level pinning (FLP) at metal-semiconductor interfaces impedes high-performance p-type transition metal dichalcogenide field-effect transistors (FETs).
- Large Schottky barriers resulting from FLP limit efficient hole injection, hindering device functionality.
Purpose of the Study:
- To introduce and evaluate a hybrid-contact architecture for mitigating FLP effects in WSe2 FETs.
- To enhance p-type conduction and reduce contact resistance in WSe2-based devices.
Main Methods:
- Fabrication of hybrid-contact WSe2 FETs using thermal scanning probe lithography and hard-mask etching.
- Electrical characterization to assess device performance, including hole current and contact resistance.
- Temperature-dependent measurements to determine Schottky barrier height (SBH).
Main Results:
- Hybrid-contact configurations achieved a 25-fold increase in hole current compared to conventional designs.
- Contact resistance was significantly reduced to 3.96 kΩ·μm⁻¹.
- Low Schottky barrier height (SBH) of approximately 34 meV for hole injection was confirmed.
Conclusions:
- The hybrid-contact design effectively mitigates FLP, enabling efficient p-type conduction in WSe2 FETs.
- This approach offers universal benefits for both p- and n-type operations, particularly with high-work-function metals.
- The study presents a practical strategy for developing complementary circuits and advancing post-silicon electronics.
Related Concept Videos
Metal-Semiconductor Junctions
Schottky Barriers
Schottky barriers arise when a metal with a work function (Φm) contacts a semiconductor with a different work function (Φs). Initially, electrons transfer until the Fermi levels of the metal and semiconductor align at equilibrium. For instance, if Φm > Φs, the semiconductor Fermi level is higher than the metal's before contact. The...
MOSFET: Enhancement Mode
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no...
Biasing of FET
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the...
Field Effect Transistor
Biasing of Metal-Semiconductor Junctions
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
P-N junction

